Add a new hardware pixel format representing opaque block-linear CUDA
arrays (CUarray). This format is used by NVDEC when decoding into
opaque surfaces registered with cuvidRegisterDecodeSurfaces, and can
be consumed directly by NVENC as CUDA array input without requiring
a pitch-linear copy.
Signed-off-by: Diego de Souza <ddesouza@nvidia.com>
The specification for the T35MetaDataSampleEntry ('it35') box is
available in the "Draft text of ISO/IEC 14496-12 10th edition"
which can be found on the MPEG website:
https://www.mpeg.org/standards/MPEG-4/12/
Support the t35 track in mov and export the `t35_identifier`
as extradata and human readable sample description as the stream
description.
Signed-off-by: Vignesh Venkat <vigneshv@google.com>
Initialize ctx->nireq with av_cpu_count() / 2 + 1 when
unset, matching the TensorFlow and OpenVINO backends.
Create ctx->nireq THRequestItems in a loop instead of
hardcoding a single request, enabling concurrent async
inference requests for improved throughput.
Signed-off-by: Raja Rathour <imraja729@gmail.com>
The context structure was named specifically for H.264, but it's actually
used for multiple codecs (H.264, H.265, MPEG-4, etc.). Renaming it to
MediaCodecContext better reflects its actual usage and makes the code
more consistent.
No longer needed since the new uops-based rewrite.
Here's hoping we won't need to revert it if these ops come up again
in the future.
Signed-off-by: Niklas Haas <git@haasn.dev>
Instead of awkwardly reverse-engineering each uop to reflect
it back to the corresponding SwsOp, this leverages the new
compile_uops() API to directly test the uop in question.
This is not only vastly simpler but also fixes several major
shortcomings with the previous design, such as always having
to keep the reflection code in sync for any newly added uop,
or not testing uops that get translated to a packed shuffle
fast path.
The major downside is that arch-specific uops can now no longer
be tested against the C reference unless we specifically add
a C reference function for each relevant uop; and also, that the
packed shuffle fast path is currently no longer tested by checkasm.
(But this will be fixed by my upcoming pshufb uop series)
Another downside is that this effectively disables testing for e.g.
aarch64, since it does not yet use the uops architecture.
$ time checkasm --test=sw_ops --repeat=10 # 1.85s -> 1.39s
Signed-off-by: Niklas Haas <git@haasn.dev>
Rather than having two uops for the C reference code and a separate
uop for the x86 backend, we can just implement the C reference
using the same register-register assignment logic.
This results in only slightly worse codegen, since the compiler is
smart enough to eliminate the unnecessary copies.
The main downside is the fact that we need to allocate extra stack space
to back-fill the remaining (unused) pointers. In theory, we could do this
more efficiently by re-using unused *input* registers directly, but that
would require a lot of reliance on compile-time constant folding teasing
apart the entire register index tracking loop and duplicate check, so this
is a useful middle ground.
On platforms like x86, we still don't care about the PERMUTE vs
COPY distinction, but it's also harmless (2-3 extra lines to
instantiate the underlying MOVE macro on both uop variants).
Finally, we need to add a mask to the move uops to keep track of which
outputs are actually needed (especially for checkasm). Though it does result
in the rather unfortunate downside that it bloats the names of the uop
names.
The op lists change to reflect the new representation, e.g.:
rgb24 16x16 -> bgr24 16x16:
[ u8 +++X] SWS_OP_READ : 3 elem(s) packed >> 0
min: {0 0 0 _}, max: {255 255 255 _}
[ u8 +++X] SWS_OP_SWIZZLE : 2103
min: {0 0 0 _}, max: {255 255 255 _}
[ u8 XXXX] SWS_OP_WRITE : 3 elem(s) packed >> 0
('X' unused, 'z' byteswapped, '=' copied, '$' const, '+' integer, '0' zero)
translated micro-ops:
u8_read_packed_xyz
- u8_permute_zyxw
+ u8_permute_xyzw_txz_xzt
u8_write_packed_xyz
Signed-off-by: Niklas Haas <git@haasn.dev>
This was only done in compile_uops_c(). Add it here as well for consistency.
Long-term I want to move this code to ops_dispatch.c, but that requires
moving the packed shuffle solver there as well, which is still WIP.
Signed-off-by: Niklas Haas <git@haasn.dev>
This also splits off the mmsize determination to a separate helper,
to make the code a bit more reusable.
Sponsored-by: Sovereign Tech Fund
Signed-off-by: Niklas Haas <git@haasn.dev>
This can be used as an alternative to the existing compile() backend, that
takes SwsUOpList instead of SwsOpList.
Down the line, I plan on also moving the uops translation to the dispatch
layer itself, but this requires some further changes which have not yet
been merged, so this commit represents a stopgap solution.
Sponsored-by: Sovereign Tech Fund
Signed-off-by: Niklas Haas <git@haasn.dev>
Instead, use the new metadata introduced in the previous commit. The
motivating reason here is a desire to stop taking a direct SwsOpList from
the backends altogether.
In theory, we could still recover this information from the `uops` list
itself, but that would require far more boilerplate than simply having
uops.c generate it using existing SwsOpsList helpers.
Sponsored-by: Sovereign Tech Fund
Signed-off-by: Niklas Haas <git@haasn.dev>
This reverts commit 7bc35b8426.
The aim of this patch can now be achieved via checkasm's
--function pattern matching.
Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
This variant is easy backportable but is concatdec specific
Fixes: self_ref.ffconcat
Reported-by: Yuhao Jiang <danisjiang@gmail.com>
Rediscovered-by: Anxious Koisi
Fixes: RWHkT0ASFMNI
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
This is a generic recursion limit that is not specific to a demuxer
it does change public API which makes this unsuitable for backporting
Fixes: self_ref.ffconcat
Reported-by: Yuhao Jiang <danisjiang@gmail.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Fixes: out of array access
Fixes: poc.hevc / make_poc.py
Fixes: 83WY4xnR87vb
Fixes: dad354f38d (avcodec/hevc: Check max ctb addresses for WPP)
Found-by: VulnForge Security Research Team <haoyuliu@clouditera.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Convert packed 24/32-bit RGB/BGR/RGBA/BGRA input to PAL8 using a per-frame palette
whose colors are placed on a face-centered cubic lattice (realized as the
scaled D3/D4 checkerboard lattice), with a user-supplied density controlling
the number of lattice steps spanning one color axis.
Only lattice points actually used by a frame enter its palette; if a frame
needs more than 256 of them, the filter will itearatively drop palettte
entries and reassign affected pixels until 256 color remain
lookup uses the Conway-Sloane rounding algorithm. Supported dithering
modes: none, ordered 8x8 bayer (swscale), Cluster & Void blue noise and
Floyd-Steinberg error diffusion.
Co-Authored-by: Fable-5
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
The encoded session parameters buffer was never freed, and both
GetEncodedVideoSessionParametersKHR error paths returned err, which
is always 0 at that point, reporting success on failure.
ff_hw_base_encode_close() frees any pictures still in the encode
queue without invoking the encoder's free callback, leaking their
image views when an encoder is closed without fully draining it.
Also uninit the packet buffer pool before the base encode context,
rather than after.
The CBS context, its current access unit fragment, and the SEI
buffers were never freed, leaking the refcounted parameter set
clones stored in the CBS private data on every encoder teardown.
The CLEAR codegen iterated components by value[i].den, while the
constants pass iterates by clear.mask; unmasked components may hold
leftover values with a nonzero denominator, consuming more constant
IDs than were registered and emitting ID 0 into the instruction
stream.
The image handle arrays were also sized by the number of planes an
op touches, but plane_src/plane_dst contain actual frame plane
indices, so a pass writing only e.g. the alpha plane references
handle 3 while only handle 0 was loaded.
Either results in invalid SPIR-V, which crashes RADV inside
spirv_to_nir when creating the shader object.
