avfilter/x86/vf_atadenoise: Avoid shifting unnecessarily

For a word mask register (where all the values are either
0x0 or 0xFFFF) a right logical shift by 15 is equivalent
to negating, so instead of negating the mask and then adding
it to another register one can simply subtract the mask from
the other register.

Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
This commit is contained in:
Andreas Rheinhardt
2026-08-04 18:12:12 +02:00
committed by James Almer
parent 698f0d22bf
commit 5ccfaa872a

View File

@@ -85,8 +85,7 @@ cglobal atadenoise_filter_row8, 6,10,13, src, dst, srcf, w, mid, size, i, j, src
mova m12, m6
pand m9, m6
paddw m7, m9
psrlw m6, 15
paddw m8, m6
psubw m8, m6
mov srcfxq, [srcfq + iq * 8]
add srcfxq, wq
@@ -105,8 +104,7 @@ cglobal atadenoise_filter_row8, 6,10,13, src, dst, srcf, w, mid, size, i, j, src
mova m12, m6
pand m9, m6
paddw m7, m9
psrlw m6, 15
paddw m8, m6
psubw m8, m6
ptest m12, m12
jz .finish
@@ -190,8 +188,7 @@ cglobal atadenoise_filter_row8_serial, 6,10,12, src, dst, srcf, w, mid, size, i,
mova m11, m6
pand m9, m6
paddw m7, m9
psrlw m6, 15
paddw m8, m6
psubw m8, m6
ptest m11, m11
jz .end_loop0
@@ -223,8 +220,7 @@ cglobal atadenoise_filter_row8_serial, 6,10,12, src, dst, srcf, w, mid, size, i,
mova m11, m6
pand m9, m6
paddw m7, m9
psrlw m6, 15
paddw m8, m6
psubw m8, m6
ptest m11, m11
jz .finish