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https://github.com/FFmpeg/FFmpeg.git
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aa483bc422
For modern cpus (like those supporting AVX2) loads and stores using the unaligned versions of instructions are as fast as aligned ones if the address is aligned, so remove the aligned AVX2 version (and the alignment check) and just use the unaligned one. Reviewed-by: Lynne <dev@lynne.ee> Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
165 lines
3.6 KiB
NASM
165 lines
3.6 KiB
NASM
;******************************************************************************
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;* optimized bswap buffer functions
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;* Copyright (c) 2008 Loren Merritt
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;* Copyright (c) 2003-2013 Michael Niedermayer
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;* Copyright (c) 2013 Daniel Kang
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pb_bswap32: db 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12
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cextern pb_80
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SECTION .text
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; %1 = aligned/unaligned
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%macro BSWAP_LOOPS 1
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mov r3d, r2d
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%if cpuflag(avx2)
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sar r3d, 4
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jz .left8_%1
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%else
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sar r3d, 3
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jz .left4_%1
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%endif
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.loop8_%1:
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mov%1 m0, [r1 + 0]
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mov%1 m1, [r1 + mmsize]
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%if cpuflag(ssse3)||cpuflag(avx2)
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pshufb m0, m2
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pshufb m1, m2
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mov%1 [r0 + 0], m0
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mov%1 [r0 + mmsize], m1
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%else
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pshuflw m0, m0, 10110001b
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pshuflw m1, m1, 10110001b
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pshufhw m0, m0, 10110001b
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pshufhw m1, m1, 10110001b
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mova m2, m0
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mova m3, m1
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psllw m0, 8
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psllw m1, 8
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psrlw m2, 8
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psrlw m3, 8
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por m2, m0
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por m3, m1
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mov%1 [r0 + 0], m2
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mov%1 [r0 + 16], m3
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%endif
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add r0, mmsize*2
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add r1, mmsize*2
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dec r3d
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jnz .loop8_%1
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%if cpuflag(avx2)
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.left8_%1:
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test r2d, 8
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jz .left4_%1
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mov%1 m0, [r1]
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pshufb m0, m2
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mov%1 [r0 + 0], m0
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add r1, mmsize
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add r0, mmsize
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%endif
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.left4_%1:
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test r2d, 4
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jz .left
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mov%1 xm0, [r1]
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%if cpuflag(ssse3)
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pshufb xm0, xm2
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mov%1 [r0], xm0
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%else
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pshuflw m0, m0, 10110001b
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pshufhw m0, m0, 10110001b
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mova m2, m0
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psllw m0, 8
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psrlw m2, 8
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por m2, m0
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mov%1 [r0], m2
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%endif
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add r1, 16
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add r0, 16
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%endmacro
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; void ff_bswap_buf(uint32_t *dst, const uint32_t *src, int w);
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%macro BSWAP32_BUF 0
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%if cpuflag(avx2)
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cglobal bswap32_buf, 3,4,3
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vbroadcasti128 m2, [pb_bswap32]
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BSWAP_LOOPS u
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%else
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%if cpuflag(ssse3)
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cglobal bswap32_buf, 3,4,3
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mova m2, [pb_bswap32]
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mov r3, r1
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%else
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cglobal bswap32_buf, 3,4,5
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mov r3, r1
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%endif
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or r3, r0
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test r3, mmsize - 1
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jz .start_align
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BSWAP_LOOPS u
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jmp .left
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.start_align:
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BSWAP_LOOPS a
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%endif
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.left:
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%if cpuflag(ssse3)
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test r2d, 2
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jz .left1
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movq xm0, [r1]
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pshufb xm0, xm2
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movq [r0], xm0
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add r1, 8
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add r0, 8
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.left1:
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test r2d, 1
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jz .end
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mov r2d, [r1]
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bswap r2d
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mov [r0], r2d
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%else
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and r2d, 3
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jz .end
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.loop2:
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mov r3d, [r1]
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bswap r3d
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mov [r0], r3d
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add r1, 4
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add r0, 4
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dec r2d
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jnz .loop2
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%endif
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.end:
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RET
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%endmacro
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INIT_XMM sse2
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BSWAP32_BUF
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INIT_XMM ssse3
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BSWAP32_BUF
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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BSWAP32_BUF
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%endif
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