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c61690153c
ops_asmgen.c contains common aarch64 asm generation code that will be used by CPS backend and the JIT backend. The standalone tool with CPS-specific code is now ops_static.c. Sponsored-by: Sovereign Tech Fund Signed-off-by: Ramiro Polla <ramiro.polla@gmail.com>
87 lines
2.4 KiB
C
87 lines
2.4 KiB
C
/*
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* Copyright (C) 2026 Ramiro Polla
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SWSCALE_AARCH64_OPS_ASMGEN_H
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#define SWSCALE_AARCH64_OPS_ASMGEN_H
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#include "rasm.h"
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/*********************************************************************/
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typedef struct SwsAArch64OpRegs {
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RasmOp sl[ 4]; /* input vector registers (low bank) */
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RasmOp sh[ 4]; /* input vector registers (high bank) */
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RasmOp dl[ 4]; /* output vector registers (low bank) */
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RasmOp dh[ 4]; /* output vector registers (high bank) */
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RasmOp vt[12]; /* temp vector registers */
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RasmOp vk[ 4]; /* constant data (may be gprs) */
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/* Op-specific registers. */
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union {
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RasmOp dither_ptr;
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RasmOp linear_vcoeff[4][5];
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};
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} SwsAArch64OpRegs;
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/*********************************************************************/
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typedef struct SwsAArch64Context {
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RasmContext *rctx;
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/* SwsOpFunc arguments. */
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RasmOp exec;
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RasmOp impl;
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RasmOp bx_start;
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RasmOp y_start;
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RasmOp bx_end;
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RasmOp y_end;
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/* Loop iterator variables. */
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RasmOp bx;
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RasmOp y;
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/* Scratch registers. */
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RasmOp tmp0;
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RasmOp tmp1;
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/* CPS-related variables. */
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RasmOp op0_func;
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RasmOp op1_impl;
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RasmOp cont;
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RasmNode *load_cont_node;
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SwsAArch64OpRegs regs;
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/* Read/Write data pointers and padding. */
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RasmOp in[4];
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RasmOp out[4];
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RasmOp in_bump[4];
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RasmOp out_bump[4];
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/* Process function. */
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RasmNode *setup;
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RasmNode *loop;
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/* Vector register dimensions. */
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size_t el_size;
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size_t el_count;
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size_t vec_size;
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bool use_vh;
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} SwsAArch64Context;
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#endif /* SWSCALE_AARCH64_OPS_ASMGEN_H */
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