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Add NEON implementation using LD3 to load 48 bytes with de-interleaving using which 6 bits are extracted using USHR and SLI to get 4 registers, which is used as a index into lookup table using TBL with 4 registers to translate into the 64-byte output, which is written using ST4 to interleave. Add a checkasm test to validate the input lengths from 0 to 239 bytes to cover all the code paths introduced in the NEON implementation. Refactored the C implementation into a header file so that it can be used from checkasm test without having to duplicate the code there. Observed about 4x speedup by checkasm on A720 core on 1kB input: C: - base64.base64 [OK] NEON: - base64.base64 [OK] checkasm: all 1 tests passed Benchmark results: name nsecs (vs ref) av_base64_encode_c: 1286.9 av_base64_encode_neon: 315.5 ( 4.08x)
18 lines
813 B
Makefile
18 lines
813 B
Makefile
OBJS += aarch64/aes_init.o \
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aarch64/cpu.o \
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aarch64/float_dsp_init.o \
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aarch64/tx_float_init.o \
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ARMV8-OBJS += aarch64/crc.o
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NEON-OBJS += aarch64/aes.o \
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aarch64/base64.o \
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aarch64/float_dsp_neon.o \
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aarch64/tx_float_neon.o \
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NEON-OBJS-$(CONFIG_PIXELUTILS) += aarch64/pixelutils_neon.o
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SVE-OBJS += aarch64/cpu_sve.o \
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SME-OBJS += aarch64/cpu_sme.o \
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