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Widths 4 to 64 at 8 bit, with the height a runtime argument as in the C code. Factoring 2^min(logw,logh) out of the numerator keeps the whole kernel in words: the largest intermediate is 32704, when max(w,h) is 64. The term that is linear in y is carried as a running accumulator, so a row costs one pmullw and three shifts per column group. Widths 32 and 64 run two column groups per pass and write a row with a single 32 byte store. checkasm --bench on a Core Ultra 7 155H: vvc_pred_planar_4x4_8_c: 63.0 vvc_pred_planar_4x4_8_avx2: 20.3 ( 3.10x) vvc_pred_planar_8x8_8_c: 216.7 vvc_pred_planar_8x8_8_avx2: 35.6 ( 6.09x) vvc_pred_planar_16x16_8_c: 966.4 vvc_pred_planar_16x16_8_avx2: 80.3 (12.03x) vvc_pred_planar_32x32_8_c: 3032.7 vvc_pred_planar_32x32_8_avx2: 251.5 (12.06x) vvc_pred_planar_64x64_8_c: 10389.9 vvc_pred_planar_64x64_8_avx2: 967.1 (10.74x)