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FFmpeg/libavcodec/x86/me_cmp.asm
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dgavriloff 57f9d96cac avcodec/x86/me_cmp: Port 8-wide SAD/VSAD functions from MMXEXT to SSE2 
Continues the work from d91b1559e0 and 8157aa1a3f which ported the
16-wide and (n)sse functions. The remaining 8-wide MMXEXT functions
(sad8, sad8_x2, sad8_y2, sad8_approx_xy2, vsad_intra8, vsad8_approx)
are always overridden on x86-64 where SSE2 is baseline.

For SAD, SAD_X2, SAD_Y2 and SAD_APPROX_XY2 two consecutive 8-byte
rows are packed into one xmm register (movh + movhps, or movh +
punpcklqdq when a row is carried across iterations); a single psadbw
then produces both row SADs in the low and high qwords, combined by
movhlps + paddw at the end.

VSAD_INTRA and VSAD_APPROX consume each row in two consecutive pairs
(N-1, N) and (N, N+1), so packing would require duplicating loads or
restructuring the carry-forward; these use movh loads with register-
register psadbw without packing.

Old benchmarks (MMXEXT):
pix_abs_1_0_c:                                           8.9 ( 1.00x)
pix_abs_1_0_mmxext:                                      6.4 ( 1.38x)
pix_abs_1_1_c:                                          85.3 ( 1.00x)
pix_abs_1_1_mmxext:                                      9.2 ( 9.29x)
pix_abs_1_2_c:                                           9.9 ( 1.00x)
pix_abs_1_2_mmxext:                                      9.5 ( 1.04x)
sad_1_c:                                                12.8 ( 1.00x)
sad_1_mmxext:                                            6.5 ( 1.98x)
vsad_5_c:                                               45.7 ( 1.00x)
vsad_5_mmxext:                                           4.9 ( 9.39x)

New benchmarks (SSE2):
pix_abs_1_0_c:                                           7.9 ( 1.00x)
pix_abs_1_0_sse2:                                        6.0 ( 1.32x)
pix_abs_1_1_c:                                          89.5 ( 1.00x)
pix_abs_1_1_sse2:                                        9.1 ( 9.84x)
pix_abs_1_2_c:                                          10.4 ( 1.00x)
pix_abs_1_2_sse2:                                        7.6 ( 1.37x)
sad_1_c:                                                 7.7 ( 1.00x)
sad_1_sse2:                                              5.9 ( 1.30x)
vsad_5_c:                                               53.2 ( 1.00x)
vsad_5_sse2:                                             5.3 (10.04x)

Signed-off-by: dgavriloff <denis.gavriloff@gmail.com>
2026-09-20 12:29:38 +00:00

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;*****************************************************************************
;* SIMD-optimized motion compensation estimation
;*****************************************************************************
;* Copyright (c) 2000, 2001 Fabrice Bellard
;* Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at>
;*
;* This file is part of FFmpeg.
;*
;* FFmpeg is free software; you can redistribute it and/or
;* modify it under the terms of the GNU Lesser General Public
;* License as published by the Free Software Foundation; either
;* version 2.1 of the License, or (at your option) any later version.
;*
;* FFmpeg is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;* Lesser General Public License for more details.
;*
;* You should have received a copy of the GNU Lesser General Public
;* License along with FFmpeg; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
;*****************************************************************************
%include "libavutil/x86/x86util.asm"
SECTION_RODATA
cextern pb_1
cextern pb_80
cextern pw_2
pb_unpack1: db 0, 0xFF, 1, 0xFF, 2, 0xFF, 3, 0xFF, 4, 0xFF, 5, 0xFF, 6, 0xFF, 0xFF, 0xFF
pb_unpack2: db 1, 0xFF, 2, 0xFF, 3, 0xFF, 4, 0xFF, 5, 0xFF, 6, 0xFF, 7, 0xFF, 0xFF, 0xFF
SECTION .text
%macro DIFF_PIXELS_1 4
movh %1, %3
movh %2, %4
punpcklbw %2, %1
punpcklbw %1, %1
psubw %1, %2
%endmacro
; %1=const uint8_t *pix1, %2=const uint8_t *pix2, %3=static offset, %4=stride, %5=stride*3
; %6=temporary storage location
; this macro requires $mmsize stack space (aligned) on %6 (except on SSE+x86-64)
%macro DIFF_PIXELS_8 6
DIFF_PIXELS_1 m0, m7, [%1 +%3], [%2 +%3]
DIFF_PIXELS_1 m1, m7, [%1+%4 +%3], [%2+%4 +%3]
DIFF_PIXELS_1 m2, m7, [%1+%4*2+%3], [%2+%4*2+%3]
add %1, %5
add %2, %5
DIFF_PIXELS_1 m3, m7, [%1 +%3], [%2 +%3]
DIFF_PIXELS_1 m4, m7, [%1+%4 +%3], [%2+%4 +%3]
DIFF_PIXELS_1 m5, m7, [%1+%4*2+%3], [%2+%4*2+%3]
DIFF_PIXELS_1 m6, m7, [%1+%5 +%3], [%2+%5 +%3]
%ifdef m8
DIFF_PIXELS_1 m7, m8, [%1+%4*4+%3], [%2+%4*4+%3]
%else
mova [%6], m0
DIFF_PIXELS_1 m7, m0, [%1+%4*4+%3], [%2+%4*4+%3]
mova m0, [%6]
%endif
sub %1, %5
sub %2, %5
%endmacro
%macro HADAMARD8 0
%if ARCH_X86_64
SUMSUB_BADC w, 0, 1, 2, 3, 8
SUMSUB_BADC w, 4, 5, 6, 7, 8
SUMSUB_BADC w, 0, 2, 1, 3, 8
SUMSUB_BADC w, 4, 6, 5, 7, 8
SUMSUB_BADC w, 0, 4, 1, 5, 8
SUMSUB_BADC w, 2, 6, 3, 7, 8
%else
SUMSUB_BADC w, 0, 1, 2, 3
SUMSUB_BADC w, 4, 5, 6, 7
SUMSUB_BADC w, 0, 2, 1, 3
SUMSUB_BADC w, 4, 6, 5, 7
SUMSUB_BADC w, 0, 4, 1, 5
SUMSUB_BADC w, 2, 6, 3, 7
%endif
%endmacro
%macro ABS1_SUM 3
ABS1 %1, %2
paddusw %3, %1
%endmacro
%macro ABS2_SUM 6
ABS2 %1, %2, %3, %4
paddusw %5, %1
paddusw %6, %2
%endmacro
%macro ABS_SUM_8x8_64 1
ABS2 m0, m1, m8, m9
ABS2_SUM m2, m3, m8, m9, m0, m1
ABS2_SUM m4, m5, m8, m9, m0, m1
ABS2_SUM m6, m7, m8, m9, m0, m1
paddusw m0, m1
%endmacro
%macro ABS_SUM_8x8_32 1
mova [%1], m7
ABS1 m0, m7
ABS1 m1, m7
ABS1_SUM m2, m7, m0
ABS1_SUM m3, m7, m1
ABS1_SUM m4, m7, m0
ABS1_SUM m5, m7, m1
ABS1_SUM m6, m7, m0
mova m2, [%1]
ABS1_SUM m2, m7, m1
paddusw m0, m1
%endmacro
; FIXME: HSUM saturates at 64k, while an 8x8 hadamard or dct block can get up to
; about 100k on extreme inputs. But that's very unlikely to occur in natural video,
; and it's even more unlikely to not have any alternative mvs/modes with lower cost.
%macro HSUM 3
movhlps %2, %1
paddusw %1, %2
pshuflw %2, %1, 0xE
paddusw %1, %2
pshuflw %2, %1, 0x1
paddusw %1, %2
movd %3, %1
%endmacro
%macro HADAMARD8_DIFF 1
cglobal hadamard8_diff16, 5, 6, %1, 2*mmsize*ARCH_X86_32
call hadamard8x8_diff %+ SUFFIX
mov r5d, eax
add r1, 8
add r2, 8
call hadamard8x8_diff %+ SUFFIX
add r5d, eax
cmp r4d, 16
jne .done
lea r1, [r1+r3*8-8]
lea r2, [r2+r3*8-8]
call hadamard8x8_diff %+ SUFFIX
add r5d, eax
add r1, 8
add r2, 8
call hadamard8x8_diff %+ SUFFIX
add r5d, eax
.done:
mov eax, r5d
RET
cglobal hadamard8_diff, 4, 4, %1, 2*mmsize*ARCH_X86_32
TAIL_CALL hadamard8x8_diff %+ SUFFIX, 0
; r1, r2 and r3 are not clobbered in this function, so 16x16 can
; simply call this 2x2x (and that's why we access rsp+gprsize
; everywhere, which is rsp of calling function)
hadamard8x8_diff %+ SUFFIX:
lea r0, [r3*3]
DIFF_PIXELS_8 r1, r2, 0, r3, r0, rsp+gprsize
HADAMARD8
%if ARCH_X86_64
TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, 8
%else
TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, [rsp+gprsize], [rsp+mmsize+gprsize]
%endif
HADAMARD8
ABS_SUM_8x8 rsp+gprsize
HSUM m0, m1, eax
and eax, 0xFFFF
ret
%endmacro
INIT_XMM sse2
%if ARCH_X86_64
%define ABS_SUM_8x8 ABS_SUM_8x8_64
%else
%define ABS_SUM_8x8 ABS_SUM_8x8_32
%endif
HADAMARD8_DIFF 10
INIT_XMM ssse3
%define ABS_SUM_8x8 ABS_SUM_8x8_64
HADAMARD8_DIFF 9
; int ff_sse*_sse2(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2,
; ptrdiff_t line_size, int h)
%macro SUM_SQUARED_ERRORS 1
cglobal sse%1, 5,5,%1 < mmsize ? 6 : 8, v, pix1, pix2, lsize, h
pxor m0, m0 ; mm0 = 0
pxor m5, m5 ; m5 holds the sum
.next2lines: ; FIXME why are these unaligned movs? pix1[] is aligned
%if %1 < mmsize
movh m1, [pix1q]
movh m2, [pix2q]
movh m3, [pix1q+lsizeq]
movh m4, [pix2q+lsizeq]
punpcklbw m1, m0
punpcklbw m2, m0
punpcklbw m3, m0
punpcklbw m4, m0
psubw m1, m2
psubw m3, m4
pmaddwd m1, m1
pmaddwd m3, m3
%else
movu m1, [pix1q] ; m1 = pix1[0][0-15]
movu m2, [pix2q] ; m2 = pix2[0][0-15]
movu m3, [pix1q+lsizeq] ; m3 = pix1[1][0-15]
movu m4, [pix2q+lsizeq] ; m4 = pix2[1][0-15]
; todo: mm1-mm2, mm3-mm4
; algo: subtract mm1 from mm2 with saturation and vice versa
; OR the result to get the absolute difference
mova m6, m1
mova m7, m3
psubusb m1, m2
psubusb m3, m4
psubusb m2, m6
psubusb m4, m7
por m2, m1
por m4, m3
; now convert to 16-bit vectors so we can square them
mova m1, m2
mova m3, m4
punpckhbw m2, m0
punpckhbw m4, m0
punpcklbw m1, m0 ; mm1 not spread over (mm1,mm2)
punpcklbw m3, m0 ; mm4 not spread over (mm3,mm4)
pmaddwd m2, m2
pmaddwd m4, m4
pmaddwd m1, m1
pmaddwd m3, m3
paddd m1, m2
paddd m3, m4
%endif
paddd m5, m1
paddd m5, m3
lea pix1q, [pix1q + 2*lsizeq]
lea pix2q, [pix2q + 2*lsizeq]
sub hd, 2
jnz .next2lines
HADDD m5, m1
movd eax, m5 ; return value
RET
%endmacro
INIT_XMM sse2
SUM_SQUARED_ERRORS 8
SUM_SQUARED_ERRORS 16
;-----------------------------------------------
;int ff_sum_abs_dctelem(const int16_t *block)
;-----------------------------------------------
; %1 = number of xmm registers used
; %2 = number of inline loops
%macro SUM_ABS_DCTELEM 2
cglobal sum_abs_dctelem, 1, 1, %1, block
pxor m0, m0
pxor m1, m1
%assign %%i 0
%rep %2
mova m2, [blockq+mmsize*(0+%%i)]
mova m3, [blockq+mmsize*(1+%%i)]
mova m4, [blockq+mmsize*(2+%%i)]
mova m5, [blockq+mmsize*(3+%%i)]
ABS1_SUM m2, m6, m0
ABS1_SUM m3, m6, m1
ABS1_SUM m4, m6, m0
ABS1_SUM m5, m6, m1
%assign %%i %%i+4
%endrep
paddusw m0, m1
HSUM m0, m1, eax
and eax, 0xFFFF
RET
%endmacro
INIT_XMM sse2
SUM_ABS_DCTELEM 7, 2
INIT_XMM ssse3
SUM_ABS_DCTELEM 6, 2
;------------------------------------------------------------------------------
; int ff_hf_noise*_ssse3(const uint8_t *pix1, ptrdiff_t lsize, int h)
;------------------------------------------------------------------------------
; %1 = 8/16, %2-5=m#, %6 = src
%macro HF_NOISE_PART1 6
%if %1 == mmsize
movu m%2, [%6]
mova m%3, m%2
pslldq m%2, 1
psrldq m%3, 1
psrldq m%2, 1
mova m%4, m%2
mova m%5, m%3
punpcklbw m%2, m7
punpcklbw m%3, m7
punpckhbw m%4, m7
punpckhbw m%5, m7
psubw m%2, m%3
psubw m%4, m%5
%else
movh m%2, [%6]
pshufb m%3, m%2, m5
pshufb m%2, m%2, m4
psubw m%2, m%3
%endif
%endmacro
; %1 = 8/16, %2-5 = m#
%macro HF_NOISE_PART2 5
%if %1 == mmsize
psubw m%2, m%3
psubw m%4, m%5
pabsw m%2, m%2
pabsw m%4, m%4
paddw m%2, m%4
%else
psubw m%2, m%3
pabsw m%2, m%2
%endif
paddw m0, m%2
%endmacro
; %1 = 8/16
%macro HF_NOISE 1
cglobal hf_noise%1, 3,3,(%1 == 8) ? 6 : 8, pix1, lsize, h
%if %1 == 8
mova m4, [pb_unpack1]
mova m5, [pb_unpack2]
%else
pxor m4, m4
%endif
sub hd, 2
pxor m0, m0
HF_NOISE_PART1 %1, 1, 2, 5, 7, pix1q
HF_NOISE_PART1 %1, 3, 2, 6, 7, pix1q+lsizeq
lea pix1q, [pix1q+2*lsizeq]
HF_NOISE_PART2 %1, 1, 3, 5, 6
.loop:
HF_NOISE_PART1 %1, 1, 2, 5, 7, pix1q
HF_NOISE_PART2 %1, 3, 1, 6, 5
HF_NOISE_PART1 %1, 3, 2, 6, 7, pix1q+lsizeq
lea pix1q, [pix1q+2*lsizeq]
HF_NOISE_PART2 %1, 1, 3, 5, 6
sub hd, 2
jne .loop
%if %1 == 8
pxor m4, m4
%endif
movhlps m1, m0
paddw m0, m1
punpcklwd m0, m4
HADDD m0, m1
movd eax, m0 ; eax = result of hf_noise;
RET ; return eax;
%endmacro
INIT_XMM ssse3
HF_NOISE 8
HF_NOISE 16
;---------------------------------------------------------------------------------------
;int ff_sad_<opt>(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2, ptrdiff_t stride, int h);
;---------------------------------------------------------------------------------------
;%1 = 8/16, %2 = a/u (whether pix1 is aligned or not)
%macro SAD 1-2
%ifidn %2, u
cglobal sad%1u, 5, 5, 5, v, pix1, pix2, stride, h
%else
cglobal sad%1, 5, 5, 3, v, pix1, pix2, stride, h
%endif
%if %1 < mmsize
movh m2, [pix2q]
movhps m2, [pix2q+strideq]
movh m0, [pix1q]
movhps m0, [pix1q+strideq]
psadbw m2, m0
%else
movu m2, [pix2q]
movu m1, [pix2q+strideq]
%ifidn %2, u
movu m0, [pix1q]
movu m3, [pix1q+strideq]
psadbw m2, m0
psadbw m1, m3
%else
psadbw m2, [pix1q]
psadbw m1, [pix1q+strideq]
%endif
paddw m2, m1
%endif
sub hd, 2
align 16
.loop:
lea pix1q, [pix1q+strideq*2]
lea pix2q, [pix2q+strideq*2]
%if %1 < mmsize
movh m0, [pix2q]
movhps m0, [pix2q+strideq]
movh m1, [pix1q]
movhps m1, [pix1q+strideq]
psadbw m0, m1
paddw m2, m0
%else
movu m0, [pix2q]
movu m1, [pix2q+strideq]
%ifidn %2, u
movu m3, [pix1q]
movu m4, [pix1q+strideq]
psadbw m0, m3
psadbw m1, m4
%else
psadbw m0, [pix1q]
psadbw m1, [pix1q+strideq]
%endif
paddw m2, m0
paddw m2, m1
%endif
sub hd, 2
jg .loop
movhlps m0, m2
paddw m2, m0
movd eax, m2
RET
%endmacro
INIT_XMM sse2
SAD 8
SAD 16
SAD 16, u
;------------------------------------------------------------------------------------------
;int ff_sad_x2_<opt>(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2, ptrdiff_t stride, int h);
;------------------------------------------------------------------------------------------
;%1 = 8/16
%macro SAD_X2 1
cglobal sad%1_x2, 5, 5, 5, v, pix1, pix2, stride, h
%if %1 < mmsize
movh m0, [pix2q]
movhps m0, [pix2q+strideq]
movh m3, [pix2q+1]
movhps m3, [pix2q+strideq+1]
pavgb m0, m3
movh m1, [pix1q]
movhps m1, [pix1q+strideq]
psadbw m0, m1
%else
movu m0, [pix2q]
movu m2, [pix2q+strideq]
movu m3, [pix2q+1]
movu m4, [pix2q+strideq+1]
pavgb m0, m3
pavgb m2, m4
psadbw m0, [pix1q]
psadbw m2, [pix1q+strideq]
paddw m0, m2
%endif
sub hd, 2
align 16
.loop:
lea pix1q, [pix1q+2*strideq]
lea pix2q, [pix2q+2*strideq]
%if %1 < mmsize
movh m1, [pix2q]
movhps m1, [pix2q+strideq]
movh m3, [pix2q+1]
movhps m3, [pix2q+strideq+1]
pavgb m1, m3
movh m2, [pix1q]
movhps m2, [pix1q+strideq]
psadbw m1, m2
paddw m0, m1
%else
movu m1, [pix2q]
movu m2, [pix2q+strideq]
movu m3, [pix2q+1]
movu m4, [pix2q+strideq+1]
pavgb m1, m3
pavgb m2, m4
psadbw m1, [pix1q]
psadbw m2, [pix1q+strideq]
paddw m0, m1
paddw m0, m2
%endif
sub hd, 2
jg .loop
movhlps m1, m0
paddw m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD_X2 8
SAD_X2 16
;------------------------------------------------------------------------------------------
;int ff_sad_y2_<opt>(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2, ptrdiff_t stride, int h);
;------------------------------------------------------------------------------------------
;%1 = 8/16
%macro SAD_Y2 1
cglobal sad%1_y2, 5, 5, 4, v, pix1, pix2, stride, h
%if %1 < mmsize
movh m1, [pix2q]
movh m2, [pix2q+strideq]
movh m3, [pix2q+2*strideq]
punpcklqdq m1, m2
punpcklqdq m2, m3
pavgb m1, m2
movh m2, [pix1q]
movhps m2, [pix1q+strideq]
psadbw m1, m2
mova m0, m1
mova m1, m3
%else
movu m1, [pix2q]
movu m0, [pix2q+strideq]
movu m3, [pix2q+2*strideq]
pavgb m1, m0
pavgb m0, m3
psadbw m1, [pix1q]
psadbw m0, [pix1q+strideq]
paddw m0, m1
mova m1, m3
%endif
add pix2q, strideq
sub hd, 2
align 16
.loop:
lea pix1q, [pix1q+2*strideq]
lea pix2q, [pix2q+2*strideq]
%if %1 < mmsize
movh m2, [pix2q]
movh m3, [pix2q+strideq]
punpcklqdq m1, m2
punpcklqdq m2, m3
pavgb m1, m2
movh m2, [pix1q]
movhps m2, [pix1q+strideq]
psadbw m1, m2
paddw m0, m1
mova m1, m3
%else
movu m2, [pix2q]
movu m3, [pix2q+strideq]
pavgb m1, m2
pavgb m2, m3
psadbw m1, [pix1q]
psadbw m2, [pix1q+strideq]
paddw m0, m1
paddw m0, m2
mova m1, m3
%endif
sub hd, 2
jg .loop
movhlps m1, m0
paddw m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD_Y2 8
SAD_Y2 16
;------------------------------------------------------------------------------------------
;int ff_sad_xy2_<opt>(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2, ptrdiff_t stride, int h);
;------------------------------------------------------------------------------------------
;%1 = 8/16, %2 = aligned mov, %3 = unaligned mov
%macro SAD_XY2 3
cglobal sad%1_xy2, 5, 5, mmsize == 16 ? 8 + ARCH_X86_64 : 7, v, pix1, pix2, stride, h
mov%3 m2, [pix2q]
mov%3 m3, [pix2q+1]
%if %1 == mmsize
%if ARCH_X86_64
mova m8, [pw_2]
%define PW_2 m8
%else
%define PW_2 [pw_2]
%endif
%else ; %1 != mmsize
mova m6, [pw_2]
%define PW_2 m6
%endif
pxor m1, m1
add pix2q, strideq
%if %1 != mmsize/2
mova m6, m2
mova m7, m3
punpckhbw m6, m1
punpckhbw m7, m1
paddw m6, m7
%endif
punpcklbw m2, m1
punpcklbw m3, m1
paddw m2, m3
mova m0, m1
.loop:
mov%3 m3, [pix2q]
mov%3 m4, [pix2q+1]
%if %1 != mmsize/2
mova m5, m3
mova m7, m4
punpckhbw m5, m1
punpckhbw m7, m1
paddw m7, m5
paddw m7, PW_2
paddw m6, m7
psraw m6, 2
%endif
mov%2 m5, [pix1q]
punpcklbw m3, m1
punpcklbw m4, m1
paddw m3, m4
paddw m3, PW_2
paddw m2, m3
psraw m2, 2
packuswb m2, m6
psadbw m2, m5
paddw m0, m2
mov%3 m2, [pix2q+strideq]
mov%3 m4, [pix2q+strideq+1]
%if %1 != mmsize/2
mova m5, m2
mova m6, m4
punpckhbw m5, m1
punpckhbw m6, m1
paddw m6, m5
paddw m7, m6
psraw m7, 2
%endif
mov%2 m5, [pix1q+strideq]
punpcklbw m2, m1
punpcklbw m4, m1
paddw m2, m4
paddw m3, m2
psraw m3, 2
packuswb m3, m7
psadbw m3, m5
paddw m0, m3
sub hd, 2
lea pix1q, [pix1q+2*strideq]
lea pix2q, [pix2q+2*strideq]
jnz .loop
%if %1 == 16
movhlps m1, m0
paddw m0, m1
%endif
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD_XY2 8, h, h
SAD_XY2 16, a, u
;-------------------------------------------------------------------------------------------
;int ff_sad_approx_xy2_<opt>(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2, ptrdiff_t stride, int h);
;-------------------------------------------------------------------------------------------
;%1 = 8/16
%macro SAD_APPROX_XY2 1
cglobal sad%1_approx_xy2, 5, 5, 7, v, pix1, pix2, stride, h
mova m4, [pb_1]
%if %1 < mmsize
movh m1, [pix2q]
movh m5, [pix2q+1]
pavgb m1, m5
movh m0, [pix2q+strideq]
movh m5, [pix2q+strideq+1]
pavgb m0, m5
psubusb m0, m4
movh m3, [pix2q+2*strideq]
movh m5, [pix2q+2*strideq+1]
pavgb m3, m5
punpcklqdq m1, m0
punpcklqdq m0, m3
pavgb m0, m1
movh m2, [pix1q]
movhps m2, [pix1q+strideq]
psadbw m0, m2
%else
movu m1, [pix2q]
movu m0, [pix2q+strideq]
movu m3, [pix2q+2*strideq]
movu m5, [pix2q+1]
movu m6, [pix2q+strideq+1]
movu m2, [pix2q+2*strideq+1]
pavgb m1, m5
pavgb m0, m6
pavgb m3, m2
psubusb m0, m4
pavgb m1, m0
pavgb m0, m3
psadbw m1, [pix1q]
psadbw m0, [pix1q+strideq]
paddw m0, m1
%endif
mova m1, m3
add pix2q, strideq
sub hd, 2
align 16
.loop:
lea pix1q, [pix1q+2*strideq]
lea pix2q, [pix2q+2*strideq]
%if %1 < mmsize
movh m2, [pix2q]
movh m5, [pix2q+1]
pavgb m2, m5
psubusb m2, m4
movh m3, [pix2q+strideq]
movh m5, [pix2q+strideq+1]
pavgb m3, m5
punpcklqdq m1, m2
punpcklqdq m2, m3
pavgb m1, m2
movh m5, [pix1q]
movhps m5, [pix1q+strideq]
psadbw m1, m5
paddw m0, m1
mova m1, m3
%else
movu m2, [pix2q]
movu m3, [pix2q+strideq]
movu m5, [pix2q+1]
movu m6, [pix2q+strideq+1]
pavgb m2, m5
pavgb m3, m6
psubusb m2, m4
pavgb m1, m2
pavgb m2, m3
psadbw m1, [pix1q]
psadbw m2, [pix1q+strideq]
paddw m0, m1
paddw m0, m2
mova m1, m3
%endif
sub hd, 2
jg .loop
movhlps m1, m0
paddw m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD_APPROX_XY2 8
SAD_APPROX_XY2 16
;--------------------------------------------------------------------
;int ff_vsad_intra(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2,
; ptrdiff_t line_size, int h);
;--------------------------------------------------------------------
; %1 = 8/16, %2 = a/u (whether pix1 is aligned or not)
%macro VSAD_INTRA 2
%ifidn %2, u
cglobal vsad_intra%1u, 5, 5, 3, v, pix1, pix2, lsize, h
%else
cglobal vsad_intra%1, 5, 5, 3, v, pix1, pix2, lsize, h
%endif
mov%2 m0, [pix1q]
mov%2 m2, [pix1q+lsizeq]
psadbw m0, m2
sub hd, 2
.loop:
lea pix1q, [pix1q + 2*lsizeq]
mov%2 m1, [pix1q]
psadbw m2, m1
paddw m0, m2
mov%2 m2, [pix1q+lsizeq]
psadbw m1, m2
paddw m0, m1
sub hd, 2
jg .loop
%if %1 >= mmsize
pshufd m1, m0, 0xe
paddd m0, m1
%endif
movd eax, m0
RET
%endmacro
INIT_XMM sse2
VSAD_INTRA 8, h
VSAD_INTRA 16, a
VSAD_INTRA 16, u
;---------------------------------------------------------------------
;int ff_vsad_approx(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2,
; ptrdiff_t line_size, int h);
;---------------------------------------------------------------------
; %1 = 8/16, %2 = a/u (whether pix1 is aligned or not)
%macro VSAD_APPROX 2
%ifidn %2, u
cglobal vsad%1u_approx, 5, 5, 5, v, pix1, pix2, lsize, h
%else
cglobal vsad%1_approx, 5, 5, 5, v, pix1, pix2, lsize, h
%endif
mova m1, [pb_80]
mov%2 m0, [pix1q]
mov%2 m4, [pix1q+lsizeq]
%if %1 < mmsize
movh m3, [pix2q]
movh m2, [pix2q+lsizeq]
%else
movu m3, [pix2q]
movu m2, [pix2q+lsizeq]
%endif
psubb m0, m3
psubb m4, m2
pxor m0, m1
pxor m4, m1
psadbw m0, m4
sub hd, 2
.loop:
lea pix1q, [pix1q + 2*lsizeq]
lea pix2q, [pix2q + 2*lsizeq]
mov%2 m2, [pix1q]
%if %1 < mmsize
movh m3, [pix2q]
%else
movu m3, [pix2q]
%endif
psubb m2, m3
pxor m2, m1
psadbw m4, m2
paddw m0, m4
mov%2 m4, [pix1q+lsizeq]
%if %1 < mmsize
movh m3, [pix2q+lsizeq]
%else
movu m3, [pix2q+lsizeq]
%endif
psubb m4, m3
pxor m4, m1
psadbw m2, m4
paddw m0, m2
sub hd, 2
jg .loop
%if %1 >= mmsize
pshufd m1, m0, 0xe
paddd m0, m1
%endif
movd eax, m0
RET
%endmacro
INIT_XMM sse2
VSAD_APPROX 8, h
VSAD_APPROX 16, a
VSAD_APPROX 16, u
;---------------------------------------------------------------------
;int ff_median_sad_<opt>(MPVEncContext *v, const uint8_t *pix1, const uint8_t *pix2,
; ptrdiff_t stride, int h);
;---------------------------------------------------------------------
; Load one row of 16 pixels from pix1/pix2 and compute V = pix1 - pix2 as
; int16 words. No zero register is needed: both byte vectors are unpacked
; against the same scratch register %5, so its garbage high bytes cancel in
; the subtraction. The shifted columns are derived from the unshifted word
; vectors, so no out-of-bounds loads are made.
; %1: V columns 0-7, %2: V columns 8-15
; %3: 0w followed by V columns 0-6, %4: V columns 7-15
; %5: scratch register, its contents are irrelevant
%macro LOAD_V16 5
movu %1, [pix1q]
movu %3, [pix2q]
punpckhbw %2, %1, %5
punpcklbw %1, %5
punpckhbw %4, %3, %5
punpcklbw %3, %5
psubw %1, %3 ; V columns 0-7
psubw %2, %4 ; V columns 8-15
pslldq %3, %1, 2 ; 0w followed by V columns 0-6
palignr %4, %2, %1, 14 ; V columns 7-14
%endmacro
; Same as LOAD_V16 for one row of 8 pixels.
; %1: V columns 0-7, %2: 0w followed by V columns 0-6, %3: scratch register
%macro LOAD_V8 3
movq %1, [pix1q]
movq %2, [pix2q]
punpcklbw %1, %3
punpcklbw %2, %3
psubw %1, %2 ; V columns 0-7
pslldq %2, %1, 2 ; 0w, V columns 0-6
%endmacro
; Accumulate abs(%5 - mid_pred(%2, %3, %2 + %3 - %4)) into %1, using
; mid_pred(a, b, c) == max(min(a, b), min(max(a, b), c)).
; %1: accumulator, %2: top (clobbered), %3: left, %4: topleft (clobbered),
; %5: values being predicted, %6 scratch register
%macro MEDIAN_ABS_ACC 6
paddw %6, %2, %3 ; top + left
psubw %6, %4 ; top + left - topleft
pminsw %4, %2, %3 ; min(top, left)
pmaxsw %2, %3 ; max(top, left)
pminsw %2, %6
pmaxsw %4, %2 ; mid_pred(top, left, top + left - topleft)
psubw %4, %5
pabsw %4, %4
paddw %1, %4
%endmacro
%if ARCH_X86_64
; Accumulate one row's cost from the previous and current row vectors.
; %1-%4: previous row V (columns 0-7, 8-15, 0-6, 7-14)
; %5-%8: current row V (columns 0-7, 8-15, 0-6, 7-14), loaded here
; m0 is the accumulator, m11/m12 temporaries, m14 scratch. The top
; predictors %3/%4 are consumed by MEDIAN_ABS_ACC, but they belong to the
; previous row and are reloaded before being needed again.
%macro PROCESS_ROW16 8
LOAD_V16 %5, %6, %7, %8, m10
add pix1q, strideq
add pix2q, strideq
; columns 0-7; no special case for the first element lacking
; left and top-left predictors is needed here: The left vectors
; have 0 as first element which leads to the desired result.
MEDIAN_ABS_ACC m0, %1, %7, %3, %5, m9
; columns 8-15
MEDIAN_ABS_ACC m0, %2, %8, %4, %6, m9
%endmacro
; Register layout:
; m0 accumulator
; m1-m4 one row's V (columns 0-7, 8-15, 0-6, 7-14)
; m5-m8 the other row's V (columns 0-7, 8-15, 0-6, 7-14)
; m9 scratch register
; m10 dummy register (unclobbered)
; The loop is unrolled by two so the two register sets alternate the roles of
; previous and current row, which removes the per-row register copies.
%macro MEDIAN_SAD16 0
cglobal median_sad16, 5, 5, 10, v, pix1, pix2, stride, h
LOAD_V16 m1, m2, m3, m4, m10
add pix1q, strideq
add pix2q, strideq
; first row: abs(V(0)) + sum of abs(V(j) - V(j-1))
psubw m0, m3, m1
psubw m5, m4, m2
pabsw m0, m0
pabsw m5, m5
paddw m0, m5
sub hd, 1
jle .end
.loop:
PROCESS_ROW16 m1, m2, m3, m4, m5, m6, m7, m8
sub hd, 1
jle .end
PROCESS_ROW16 m5, m6, m7, m8, m1, m2, m3, m4
sub hd, 1
jg .loop
.end:
; the per-word sums are at most 2 * 16 * 510, but their total may need
; more than 16 bits: widen to dwords before the horizontal sum
pxor m1, m1
punpckhwd m2, m0, m1
punpcklwd m0, m1
paddd m0, m2
HADDD m0, m2
movd eax, m0
RET
%endmacro
INIT_XMM ssse3
MEDIAN_SAD16
%endif ; ARCH_X86_64
; Accumulate one row's cost from the previous and current row vectors.
; %1: previous row V columns 0-7, %2: previous row V columns 0-6
; %3: current row V columns 0-7, %4: current row V columns 0-6 (loaded here)
; m0 is the accumulator, m5 scratch register, m6 unclobbered dummy.
%macro PROCESS_ROW8 4
LOAD_V8 %3, %4, m7
add pix1q, strideq
add pix2q, strideq
; No special case for the first element lacking left and top-left
; predictors is needed here: The left vectors have 0 as first element
; which leads to the desired result.
MEDIAN_ABS_ACC m0, %1, %4, %2, %3, m5
%endmacro
; Register layout:
; m0 accumulator for columns 0-7
; m1, m2 one row's V (columns 0-7, 0-6)
; m3, m4 the other row's V (columns 0-7, 0-6)
; m5 scratch register
; m7 dummy register, unclobbered
; As in median_sad16 the loop is unrolled by two so the two register sets
; alternate the roles of previous and current row.
%macro MEDIAN_SAD8 0
cglobal median_sad8, 5, 5, 6, v, pix1, pix2, stride, h
LOAD_V8 m1, m2, m7
add pix1q, strideq
add pix2q, strideq
; first row: abs(V(0)) + sum of abs(V(j) - V(j-1))
psubw m0, m1, m2
pabsw m0, m0
sub hd, 1
jle .end
.loop:
PROCESS_ROW8 m1, m2, m3, m4
sub hd, 1
jle .end
PROCESS_ROW8 m3, m4, m1, m2
sub hd, 1
jg .loop
.end:
pxor m4, m4
punpckhwd m1, m0, m4
punpcklwd m0, m4
paddd m0, m1
HADDD m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM ssse3
MEDIAN_SAD8
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