From 7d472b77772d92e90193e5cefcad730946c544f9 Mon Sep 17 00:00:00 2001 From: daichengrong Date: Fri, 21 Aug 2026 17:36:03 +0800 Subject: [PATCH] riscv: asm: Move lx and sx macros to asm.S The lx and sx macros provide XLEN-dependent aliases for load and store instructions and are currently duplicated in several assembly files. Move the common definitions to asm.S and reuse them from there to avoid duplicating the same macros across multiple files. Signed-off-by: daichengrong --- libavcodec/riscv/h264addpx_rvv.S | 10 ---------- libavcodec/riscv/h264idct_rvv.S | 10 ---------- libavcodec/riscv/h264qpel_rvv.S | 20 -------------------- libavcodec/riscv/startcode_rvb.S | 10 ---------- libavutil/riscv/asm.S | 18 ++++++++++++++++++ 5 files changed, 18 insertions(+), 50 deletions(-) diff --git a/libavcodec/riscv/h264addpx_rvv.S b/libavcodec/riscv/h264addpx_rvv.S index 82739881d9..cf3b742294 100644 --- a/libavcodec/riscv/h264addpx_rvv.S +++ b/libavcodec/riscv/h264addpx_rvv.S @@ -26,16 +26,6 @@ #include "libavutil/riscv/asm.S" - .macro sx rd, addr -#if (__riscv_xlen == 32) - sw \rd, \addr -#elif (__riscv_xlen == 64) - sd \rd, \addr -#else - sq \rd, \addr -#endif - .endm - func ff_h264_add_pixels4_8_rvv, zve32x lpad 0 vsetivli zero, 4, e8, mf4, ta, ma diff --git a/libavcodec/riscv/h264idct_rvv.S b/libavcodec/riscv/h264idct_rvv.S index 2a40e87d62..7242dab9dc 100644 --- a/libavcodec/riscv/h264idct_rvv.S +++ b/libavcodec/riscv/h264idct_rvv.S @@ -29,16 +29,6 @@ #include "libavutil/riscv/asm.S" - .macro sx rd, addr -#if (__riscv_xlen == 32) - sw \rd, \addr -#elif (__riscv_xlen == 64) - sd \rd, \addr -#else - sq \rd, \addr -#endif - .endm - .variant_cc ff_h264_idct4_rvv func ff_h264_idct4_rvv, zve32x vsra.vi v5, v1, 1 diff --git a/libavcodec/riscv/h264qpel_rvv.S b/libavcodec/riscv/h264qpel_rvv.S index df6796748f..5351bf918f 100644 --- a/libavcodec/riscv/h264qpel_rvv.S +++ b/libavcodec/riscv/h264qpel_rvv.S @@ -28,26 +28,6 @@ #include "libavutil/riscv/asm.S" -.macro lx rd, addr -#if (__riscv_xlen == 32) - lw \rd, \addr -#elif (__riscv_xlen == 64) - ld \rd, \addr -#else - lq \rd, \addr -#endif -.endm - -.macro sx rd, addr -#if (__riscv_xlen == 32) - sw \rd, \addr -#elif (__riscv_xlen == 64) - sd \rd, \addr -#else - sq \rd, \addr -#endif -.endm - #define XSZ (__riscv_xlen / 8) #define STACK_ALIGN(x) (((x) + 15) & ~15) diff --git a/libavcodec/riscv/startcode_rvb.S b/libavcodec/riscv/startcode_rvb.S index eec92d3340..c131ebdf59 100644 --- a/libavcodec/riscv/startcode_rvb.S +++ b/libavcodec/riscv/startcode_rvb.S @@ -26,16 +26,6 @@ #include "libavutil/riscv/asm.S" - .macro lx rd, addr -#if (__riscv_xlen == 32) - lw \rd, \addr -#elif (__riscv_xlen == 64) - ld \rd, \addr -#else - lq \rd, \addr -#endif - .endm - func ff_startcode_find_candidate_rvb, zbb lpad 0 add a1, a0, a1 diff --git a/libavutil/riscv/asm.S b/libavutil/riscv/asm.S index ec68a042d1..d65fc94a61 100644 --- a/libavutil/riscv/asm.S +++ b/libavutil/riscv/asm.S @@ -237,3 +237,21 @@ .macro vntypei rd, rs, n=1 vwtypei \rd, \rs, -(\n) .endm + +#if (__riscv_xlen == 32) + .macro lx rd, addr + lw \rd, \addr + .endm + + .macro sx rs, addr + sw \rs, \addr + .endm +#elif (__riscv_xlen == 64) + .macro lx rd, addr + ld \rd, \addr + .endm + + .macro sx rs, addr + sd \rs, \addr + .endm +#endif